Bibliographic Details
| Title: |
Circuit-Level leakage reduction techniques in CMOS sense amplifiers for SRAM and TCAM: A review. |
| Authors: |
Kishore, Devesh1 (AUTHOR) kishore.devesh@gmail.com, Chakraborty, Saswata2 (AUTHOR) saswata.cmeri@gmail.com, Biswas, Arindam3 (AUTHOR) arindam.biswas@knu.ac.in, Dumka, Ankur4 (AUTHOR) ankurdumka@wit.ac.in |
| Source: |
Analog Integrated Circuits & Signal Processing. Feb2026, Vol. 126 Issue 2, p1-28. 28p. |
| Subjects: |
CMOS amplifiers, Static random access memory, Nanoelectronics, Computer storage devices |
| Abstract: |
As CMOS technology advances into deep-submicron nodes, leakage power has become a critical challenge for designing energy-efficient sense amplifiers in memory applications. High leakage currents increase overall power consumption and limit memory efficiency, necessitating effective reduction strategies. This review focuses on circuit-level leakage reduction techniques specifically tailored for CMOS sense amplifier designs utilized in SRAM and TCAM systems. It systematically categorizes sense amplifier types—voltage-mode, current-mode, and charge-transfer—and analyzes their leakage characteristics and mitigation methods. Advanced approaches such as LECTOR and LCNT are evaluated for their trade-offs in power consumption, performance, and area. Unlike existing surveys, this work highlights recent innovations in low-leakage operation for modern CMOS nodes, providing designers with comprehensive insights to optimize sense amplifier configurations for leakage-sensitive applications and guiding future low-power memory research directions. [ABSTRACT FROM AUTHOR] |
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| Database: |
Engineering Source |