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Four Current Path PRFC OTA with Cross-Coupled Positive Feedback with Improved Gain and PSRR for Analog Signal Processing.

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Title: Four Current Path PRFC OTA with Cross-Coupled Positive Feedback with Improved Gain and PSRR for Analog Signal Processing.
Authors: Singh, Rahul1 (AUTHOR) ak43103333@gmail.com, Wairya, Subodh1 (AUTHOR) swairya@gmail.com
Source: Journal of Circuits, Systems & Computers. 8/30/2026, Vol. 35 Issue 14, p1-41. 41p.
Subjects: Operational amplifiers, Analog circuits, Complementary metal oxide semiconductors, Frequency response
Abstract: In traditional folded cascode (FC) and double-recycling folded cascode (DRFC) operational transconductance amplifier (OTA) designs, high-performance analog circuits frequently encounter constraints in power supply rejection ratio (PSRR), transconductance and bandwidth. The proposed OTA is designed with a two-stage FC architecture integrated with four current paths and enhanced by cross-coupled positive feedback (PRFC). It is architecturally realized as a two-stage folded cascode OTA to facilitate gain boosting, improved bandwidth and enhanced PSRR. This two-stage nature fundamentally influences stability, transient response and frequency compensation analysis. By increasing effective transconductance, these methods guarantee that even inactive devices in the signal path enhance performance without consuming more power. Simulations in 90 nm CMOS technology show significant advancements compared to DRFC. The suggested design improves slew rate, PSRR and phase margin while achieving a 29-dB higher unity-gain frequency (UGF) and a 14-dB higher DC gain when compared to a traditional DRFC amplifier and phase margin at nearly the same power consumption. This work highlights a transconductance-enhanced OTA architecture that provides a strong balance of power efficiency and performance, making it suitable for next-generation high-performance analog design. [ABSTRACT FROM AUTHOR]
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Database: Engineering Source
Description
Abstract:In traditional folded cascode (FC) and double-recycling folded cascode (DRFC) operational transconductance amplifier (OTA) designs, high-performance analog circuits frequently encounter constraints in power supply rejection ratio (PSRR), transconductance and bandwidth. The proposed OTA is designed with a two-stage FC architecture integrated with four current paths and enhanced by cross-coupled positive feedback (PRFC). It is architecturally realized as a two-stage folded cascode OTA to facilitate gain boosting, improved bandwidth and enhanced PSRR. This two-stage nature fundamentally influences stability, transient response and frequency compensation analysis. By increasing effective transconductance, these methods guarantee that even inactive devices in the signal path enhance performance without consuming more power. Simulations in 90 nm CMOS technology show significant advancements compared to DRFC. The suggested design improves slew rate, PSRR and phase margin while achieving a 29-dB higher unity-gain frequency (UGF) and a 14-dB higher DC gain when compared to a traditional DRFC amplifier and phase margin at nearly the same power consumption. This work highlights a transconductance-enhanced OTA architecture that provides a strong balance of power efficiency and performance, making it suitable for next-generation high-performance analog design. [ABSTRACT FROM AUTHOR]
ISSN:02181266
DOI:10.1142/S0218126626500994