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Suppressing Gate-Induced Drain Leakage with an Asymmetric Gate Design in HiPco CNT FETs.

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Title: Suppressing Gate-Induced Drain Leakage with an Asymmetric Gate Design in HiPco CNT FETs.
Authors: Ma, Hui1,2,3 (AUTHOR), Gu, Senbiao1,2,3 (AUTHOR), Zhai, Minglong2,3 (AUTHOR), Liu, Honggang1,2,4 (AUTHOR) liuhonggang@pku.edu.cn
Source: Nanomaterials (2079-4991). Jun2026, Vol. 16 Issue 11, p653. 13p.
Subjects: Carbon nanotube field effect transistors, Quantum tunneling, Transistors, Nanoelectronics, Single walled carbon nanotubes
Abstract: Carbon nanotube field-effect transistors (CNT FETs) hold great promise for extending Moore's Law, yet their performance is critically limited by excessive off-state leakage, caused by band-to-band tunneling (BTBT) in narrow bandgap CNT channels. In this work, we overcome this long-standing bottleneck by introducing a co-design strategy that integrates a small-diameter HiPco CNT channel with a novel asymmetric gate architecture. This approach strategically reshapes the channel electrostatics to simultaneously suppress the gate-induced drain leakage (GIDL) effect and preserve excellent carrier transport. The efficacy of this strategy is rigorously validated through calibrated technology computer-aided design (TCAD) simulations for both NMOS and PMOS operation, demonstrating an ultralow off-current of 10 fA/µm, an on-current of 1.08 mA/µm, and a record on–off ratio of 1.1 × 1011 for back-gated CNTFETs at the 90 nm node. The design exhibits outstanding scalability: at the scaled 28 nm node with a supply voltage of 0.7 V, the PMOS device achieves 3 mA/µm on-current and 6 pA/µm off-current, maintaining an on–off ratio of 5 × 108. This work establishes a scalable pathway toward femtoampere-level CNT CMOS, addressing the static power challenge in future nano-electronics. [ABSTRACT FROM AUTHOR]
Copyright of Nanomaterials (2079-4991) is the property of MDPI and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
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  Data: Suppressing Gate-Induced Drain Leakage with an Asymmetric Gate Design in HiPco CNT FETs.
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  Data: <searchLink fieldCode="AR" term="%22Ma%2C+Hui%22">Ma, Hui</searchLink><relatesTo>1,2,3</relatesTo> (AUTHOR)<br /><searchLink fieldCode="AR" term="%22Gu%2C+Senbiao%22">Gu, Senbiao</searchLink><relatesTo>1,2,3</relatesTo> (AUTHOR)<br /><searchLink fieldCode="AR" term="%22Zhai%2C+Minglong%22">Zhai, Minglong</searchLink><relatesTo>2,3</relatesTo> (AUTHOR)<br /><searchLink fieldCode="AR" term="%22Liu%2C+Honggang%22">Liu, Honggang</searchLink><relatesTo>1,2,4</relatesTo> (AUTHOR)<i> liuhonggang@pku.edu.cn</i>
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  Data: <searchLink fieldCode="JN" term="%22Nanomaterials+%282079-4991%29%22">Nanomaterials (2079-4991)</searchLink>. Jun2026, Vol. 16 Issue 11, p653. 13p.
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  Data: <searchLink fieldCode="DE" term="%22Carbon+nanotube+field+effect+transistors%22">Carbon nanotube field effect transistors</searchLink><br /><searchLink fieldCode="DE" term="%22Quantum+tunneling%22">Quantum tunneling</searchLink><br /><searchLink fieldCode="DE" term="%22Transistors%22">Transistors</searchLink><br /><searchLink fieldCode="DE" term="%22Nanoelectronics%22">Nanoelectronics</searchLink><br /><searchLink fieldCode="DE" term="%22Single+walled+carbon+nanotubes%22">Single walled carbon nanotubes</searchLink>
– Name: Abstract
  Label: Abstract
  Group: Ab
  Data: Carbon nanotube field-effect transistors (CNT FETs) hold great promise for extending Moore's Law, yet their performance is critically limited by excessive off-state leakage, caused by band-to-band tunneling (BTBT) in narrow bandgap CNT channels. In this work, we overcome this long-standing bottleneck by introducing a co-design strategy that integrates a small-diameter HiPco CNT channel with a novel asymmetric gate architecture. This approach strategically reshapes the channel electrostatics to simultaneously suppress the gate-induced drain leakage (GIDL) effect and preserve excellent carrier transport. The efficacy of this strategy is rigorously validated through calibrated technology computer-aided design (TCAD) simulations for both NMOS and PMOS operation, demonstrating an ultralow off-current of 10 fA/µm, an on-current of 1.08 mA/µm, and a record on–off ratio of 1.1 × 1011 for back-gated CNTFETs at the 90 nm node. The design exhibits outstanding scalability: at the scaled 28 nm node with a supply voltage of 0.7 V, the PMOS device achieves 3 mA/µm on-current and 6 pA/µm off-current, maintaining an on–off ratio of 5 × 108. This work establishes a scalable pathway toward femtoampere-level CNT CMOS, addressing the static power challenge in future nano-electronics. [ABSTRACT FROM AUTHOR]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of Nanomaterials (2079-4991) is the property of MDPI and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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        Value: 10.3390/nano16110653
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        Text: English
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        Type: general
      – SubjectFull: Quantum tunneling
        Type: general
      – SubjectFull: Transistors
        Type: general
      – SubjectFull: Nanoelectronics
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      – SubjectFull: Single walled carbon nanotubes
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      – TitleFull: Suppressing Gate-Induced Drain Leakage with an Asymmetric Gate Design in HiPco CNT FETs.
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            NameFull: Ma, Hui
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            NameFull: Gu, Senbiao
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            NameFull: Zhai, Minglong
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            – D: 01
              M: 06
              Text: Jun2026
              Type: published
              Y: 2026
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