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A superconducting unary arithmetic logic unit with ultra-low hardware cost.

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Title: A superconducting unary arithmetic logic unit with ultra-low hardware cost.
Authors: Han, Zeyu1 (AUTHOR), Yoshikawa, Nobuyuki1,2,3 (AUTHOR), Yamanashi, Yuki1,2,3 (AUTHOR) yamanashi-yuki-kr@ynu.ac.jp
Source: Superconductor Science & Technology. 2026, Vol. 39 Issue 7, p1-15. 15p.
Subjects: Superconducting circuits, Computer arithmetic, Josephson junctions, Circuit complexity, Computer systems
Abstract: Single-flux-quantum (SFQ) circuits are promising candidates for post-Moore integrated circuits owing to their ultra-high-speed operation and low power consumption. However, limitations in current superconducting fabrication processes pose significant challenges to achieving area-efficient SFQ-based microprocessors, particularly in the design of compact arithmetic logic units (ALUs). Unary computing enables arithmetic operations using extremely simple logic, but typically suffers from long computation latency. This paper focuses on unary computing for superconducting circuits that exploits the complementary characteristics of SFQ logic and unary computing. The ultra-high-speed nature of SFQ circuits compensates for the inherent latency of unary computation, while unary computing enables an ultra-low hardware cost by substantially reducing circuit complexity. Based on this concept, we introduce a unary computing methodology tailored for SFQ circuits and design a superconducting unary ALU with ultra-low hardware cost. The proposed ALU requires only 183 Josephson junctions (JJs), achieving approximately 88.2% reduction in JJ count and 80.4% reduction in area compared with a conventional bit-serial SFQ ALU. The proposed design, including binary-to-unary and unary-to-binary converters, was fabricated using a 10 kA cm−2 Nb four-layer superconducting circuit fabrication process and experimentally verified to operate correctly at approximately 72 GHz. The total power consumption at this frequency is approximately 58.9 µ W. This work quantitatively demonstrates the effectiveness of combining unary computing with SFQ circuits for ultra-low-cost processing systems and provides superconducting circuits as a new design option for alternative computation paradigms, such as unary computing. [ABSTRACT FROM AUTHOR]
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Database: Engineering Source
Description
Abstract:Single-flux-quantum (SFQ) circuits are promising candidates for post-Moore integrated circuits owing to their ultra-high-speed operation and low power consumption. However, limitations in current superconducting fabrication processes pose significant challenges to achieving area-efficient SFQ-based microprocessors, particularly in the design of compact arithmetic logic units (ALUs). Unary computing enables arithmetic operations using extremely simple logic, but typically suffers from long computation latency. This paper focuses on unary computing for superconducting circuits that exploits the complementary characteristics of SFQ logic and unary computing. The ultra-high-speed nature of SFQ circuits compensates for the inherent latency of unary computation, while unary computing enables an ultra-low hardware cost by substantially reducing circuit complexity. Based on this concept, we introduce a unary computing methodology tailored for SFQ circuits and design a superconducting unary ALU with ultra-low hardware cost. The proposed ALU requires only 183 Josephson junctions (JJs), achieving approximately 88.2% reduction in JJ count and 80.4% reduction in area compared with a conventional bit-serial SFQ ALU. The proposed design, including binary-to-unary and unary-to-binary converters, was fabricated using a 10 kA cm−2 Nb four-layer superconducting circuit fabrication process and experimentally verified to operate correctly at approximately 72 GHz. The total power consumption at this frequency is approximately 58.9 µ W. This work quantitatively demonstrates the effectiveness of combining unary computing with SFQ circuits for ultra-low-cost processing systems and provides superconducting circuits as a new design option for alternative computation paradigms, such as unary computing. [ABSTRACT FROM AUTHOR]
ISSN:09532048
DOI:10.1088/1361-6668/ae7839