C-element multiplexing for fault-tolerant logic circuits.

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Bibliographic Details
Title: C-element multiplexing for fault-tolerant logic circuits.
Authors: Winstead, C.1 winstead@engineering.usu.edu
Source: Electronics Letters (Institution of Engineering & Technology). 9/10/2009, Vol. 45 Issue 19, p969-970. 2p. 1 Diagram, 2 Graphs.
Subjects: Logic circuits, Multiplexing, Gateways (Computer networks), Telecommunication, Electronic circuits
Abstract: A novel approach to von Neumann multiplexing is considered, in which NAND gates are replaced by Muller C-elements. The new method is developed as an application of maximum a-posteriori (MAP) estimation, and is shown to be superior to NAND multiplexing in systems where transient upsets are the dominant fault species. [ABSTRACT FROM AUTHOR]
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Database: Engineering Source
Description
Abstract:A novel approach to von Neumann multiplexing is considered, in which NAND gates are replaced by Muller C-elements. The new method is developed as an application of maximum a-posteriori (MAP) estimation, and is shown to be superior to NAND multiplexing in systems where transient upsets are the dominant fault species. [ABSTRACT FROM AUTHOR]
ISSN:00135194
DOI:10.1049/el.2009.1073