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C-element multiplexing for fault-tolerant logic circuits.

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Title: C-element multiplexing for fault-tolerant logic circuits.
Authors: Winstead, C.1 winstead@engineering.usu.edu
Source: Electronics Letters (Institution of Engineering & Technology). 9/10/2009, Vol. 45 Issue 19, p969-970. 2p. 1 Diagram, 2 Graphs.
Subjects: Logic circuits, Multiplexing, Gateways (Computer networks), Telecommunication, Electronic circuits
Abstract: A novel approach to von Neumann multiplexing is considered, in which NAND gates are replaced by Muller C-elements. The new method is developed as an application of maximum a-posteriori (MAP) estimation, and is shown to be superior to NAND multiplexing in systems where transient upsets are the dominant fault species. [ABSTRACT FROM AUTHOR]
Copyright of Electronics Letters (Institution of Engineering & Technology) is the property of Institution of Engineering & Technology and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
Database: Engineering Source
FullText Text:
  Availability: 0
Header DbId: egs
DbLabel: Engineering Source
An: 44150763
AccessLevel: 6
PubType: Academic Journal
PubTypeId: academicJournal
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  Data: C-element multiplexing for fault-tolerant logic circuits.
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  Data: <searchLink fieldCode="JN" term="%22Electronics+Letters+%28Institution+of+Engineering+%26+Technology%29%22">Electronics Letters (Institution of Engineering & Technology)</searchLink>. 9/10/2009, Vol. 45 Issue 19, p969-970. 2p. 1 Diagram, 2 Graphs.
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  Data: <searchLink fieldCode="DE" term="%22Logic+circuits%22">Logic circuits</searchLink><br /><searchLink fieldCode="DE" term="%22Multiplexing%22">Multiplexing</searchLink><br /><searchLink fieldCode="DE" term="%22Gateways+%28Computer+networks%29%22">Gateways (Computer networks)</searchLink><br /><searchLink fieldCode="DE" term="%22Telecommunication%22">Telecommunication</searchLink><br /><searchLink fieldCode="DE" term="%22Electronic+circuits%22">Electronic circuits</searchLink>
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  Data: A novel approach to von Neumann multiplexing is considered, in which NAND gates are replaced by Muller C-elements. The new method is developed as an application of maximum a-posteriori (MAP) estimation, and is shown to be superior to NAND multiplexing in systems where transient upsets are the dominant fault species. [ABSTRACT FROM AUTHOR]
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  Data: <i>Copyright of Electronics Letters (Institution of Engineering & Technology) is the property of Institution of Engineering & Technology and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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        Value: 10.1049/el.2009.1073
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        Text: English
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        PageCount: 2
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        Type: general
      – SubjectFull: Multiplexing
        Type: general
      – SubjectFull: Gateways (Computer networks)
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              Text: 9/10/2009
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