One-Pass Compilation of Arithmetic Expressions for a Parallel Processor.
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| Title: | One-Pass Compilation of Arithmetic Expressions for a Parallel Processor. |
|---|---|
| Authors: | Stone, Harold S.1 |
| Source: | Communications of the ACM. Apr1967, Vol. 10 Issue 4, p220-223. 4p. 1 Diagram. |
| Subjects: | Parallel processing, Computer arithmetic & logic units, Compilers (Computer programs), Arithmetic, Algorithms, Computer circuits |
| Abstract: | Under the assumption that a processor may have a multiplicity of arithmetic units, a compiler for such a processor should produce object code to take advantage of possible parallelism of operation. Most of the presently known compilation techniques are inadequate for such a processor because they produce expression structures that must be evaluated serially. A technique is presented here for compiling arithmetic expressions into structures that can be evaluated with a high degree of parallelism. The algorithm is a variant of the so-called "top-down" analysis technique, and requires only one pass of the input text. [ABSTRACT FROM AUTHOR] |
| Copyright of Communications of the ACM is the property of Association for Computing Machinery and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
| FullText | Links: – Type: pdflink Text: Availability: 0 |
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| Header | DbId: egs DbLabel: Engineering Source An: 5221465 AccessLevel: 6 PubType: Periodical PubTypeId: serialPeriodical PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: One-Pass Compilation of Arithmetic Expressions for a Parallel Processor. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Stone%2C+Harold+S%2E%22">Stone, Harold S.</searchLink><relatesTo>1</relatesTo> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22Communications+of+the+ACM%22">Communications of the ACM</searchLink>. Apr1967, Vol. 10 Issue 4, p220-223. 4p. 1 Diagram. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Parallel+processing%22">Parallel processing</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+arithmetic+%26+logic+units%22">Computer arithmetic & logic units</searchLink><br /><searchLink fieldCode="DE" term="%22Compilers+%28Computer+programs%29%22">Compilers (Computer programs)</searchLink><br /><searchLink fieldCode="DE" term="%22Arithmetic%22">Arithmetic</searchLink><br /><searchLink fieldCode="DE" term="%22Algorithms%22">Algorithms</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+circuits%22">Computer circuits</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: Under the assumption that a processor may have a multiplicity of arithmetic units, a compiler for such a processor should produce object code to take advantage of possible parallelism of operation. Most of the presently known compilation techniques are inadequate for such a processor because they produce expression structures that must be evaluated serially. A technique is presented here for compiling arithmetic expressions into structures that can be evaluated with a high degree of parallelism. The algorithm is a variant of the so-called "top-down" analysis technique, and requires only one pass of the input text. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of Communications of the ACM is the property of Association for Computing Machinery and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=egs&AN=5221465 |
| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1145/363242.363256 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 4 StartPage: 220 Subjects: – SubjectFull: Parallel processing Type: general – SubjectFull: Computer arithmetic & logic units Type: general – SubjectFull: Compilers (Computer programs) Type: general – SubjectFull: Arithmetic Type: general – SubjectFull: Algorithms Type: general – SubjectFull: Computer circuits Type: general Titles: – TitleFull: One-Pass Compilation of Arithmetic Expressions for a Parallel Processor. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Stone, Harold S. IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 04 Text: Apr1967 Type: published Y: 1967 Identifiers: – Type: issn-print Value: 00010782 Numbering: – Type: volume Value: 10 – Type: issue Value: 4 Titles: – TitleFull: Communications of the ACM Type: main |
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