Bibliographic Details
| Title: |
Capacitor-less A-RAM SOI memory: Principles, scaling and expected performance |
| Authors: |
Rodriguez, Noel1 noel@ugr.es, Cristoloveanu, Sorin2, Gamiz, Francisco1 |
| Source: |
Solid-State Electronics. May2011, Vol. 59 Issue 1, p44-49. 6p. |
| Subjects: |
Capacitors, Metal oxide semiconductor field-effect transistors, Simulation methods & models, Electrostatics, Silicon-on-insulator technology, Random access memory, Electrons, Performance evaluation |
| Abstract: |
Abstract: Based on numerical TCAD simulations, the novel capacitor-less A-RAM memory cell is detailed in terms of electrostatic effects, transient operation and retention time. The particular double-body device architecture on SOI is beneficial for better scalability than conventional 1T-DRAMs. Its dual body partitioning suppresses the supercoupling effect in SOI; the two types of carriers can coexist inside ultrathin fully depleted transistors. Electrons and holes are accommodated in different bodies, separated by an insulator layer, but remain electrostatically coupled. A-RAM features easy discrimination of ‘0’ and ‘1’ states, simple control waveforms and very promising performance. [Copyright &y& Elsevier] |
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| Database: |
Engineering Source |