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Capacitor-less A-RAM SOI memory: Principles, scaling and expected performance

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Title: Capacitor-less A-RAM SOI memory: Principles, scaling and expected performance
Authors: Rodriguez, Noel1 noel@ugr.es, Cristoloveanu, Sorin2, Gamiz, Francisco1
Source: Solid-State Electronics. May2011, Vol. 59 Issue 1, p44-49. 6p.
Subjects: Capacitors, Metal oxide semiconductor field-effect transistors, Simulation methods & models, Electrostatics, Silicon-on-insulator technology, Random access memory, Electrons, Performance evaluation
Abstract: Abstract: Based on numerical TCAD simulations, the novel capacitor-less A-RAM memory cell is detailed in terms of electrostatic effects, transient operation and retention time. The particular double-body device architecture on SOI is beneficial for better scalability than conventional 1T-DRAMs. Its dual body partitioning suppresses the supercoupling effect in SOI; the two types of carriers can coexist inside ultrathin fully depleted transistors. Electrons and holes are accommodated in different bodies, separated by an insulator layer, but remain electrostatically coupled. A-RAM features easy discrimination of ‘0’ and ‘1’ states, simple control waveforms and very promising performance. [Copyright &y& Elsevier]
Copyright of Solid-State Electronics is the property of Pergamon Press - An Imprint of Elsevier Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
Database: Engineering Source
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DbLabel: Engineering Source
An: 59642190
AccessLevel: 6
PubType: Academic Journal
PubTypeId: academicJournal
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  Data: Capacitor-less A-RAM SOI memory: Principles, scaling and expected performance
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  Data: <searchLink fieldCode="AR" term="%22Rodriguez%2C+Noel%22">Rodriguez, Noel</searchLink><relatesTo>1</relatesTo><i> noel@ugr.es</i><br /><searchLink fieldCode="AR" term="%22Cristoloveanu%2C+Sorin%22">Cristoloveanu, Sorin</searchLink><relatesTo>2</relatesTo><br /><searchLink fieldCode="AR" term="%22Gamiz%2C+Francisco%22">Gamiz, Francisco</searchLink><relatesTo>1</relatesTo>
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  Data: <searchLink fieldCode="JN" term="%22Solid-State+Electronics%22">Solid-State Electronics</searchLink>. May2011, Vol. 59 Issue 1, p44-49. 6p.
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  Data: <searchLink fieldCode="DE" term="%22Capacitors%22">Capacitors</searchLink><br /><searchLink fieldCode="DE" term="%22Metal+oxide+semiconductor+field-effect+transistors%22">Metal oxide semiconductor field-effect transistors</searchLink><br /><searchLink fieldCode="DE" term="%22Simulation+methods+%26+models%22">Simulation methods & models</searchLink><br /><searchLink fieldCode="DE" term="%22Electrostatics%22">Electrostatics</searchLink><br /><searchLink fieldCode="DE" term="%22Silicon-on-insulator+technology%22">Silicon-on-insulator technology</searchLink><br /><searchLink fieldCode="DE" term="%22Random+access+memory%22">Random access memory</searchLink><br /><searchLink fieldCode="DE" term="%22Electrons%22">Electrons</searchLink><br /><searchLink fieldCode="DE" term="%22Performance+evaluation%22">Performance evaluation</searchLink>
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  Label: Abstract
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  Data: Abstract: Based on numerical TCAD simulations, the novel capacitor-less A-RAM memory cell is detailed in terms of electrostatic effects, transient operation and retention time. The particular double-body device architecture on SOI is beneficial for better scalability than conventional 1T-DRAMs. Its dual body partitioning suppresses the supercoupling effect in SOI; the two types of carriers can coexist inside ultrathin fully depleted transistors. Electrons and holes are accommodated in different bodies, separated by an insulator layer, but remain electrostatically coupled. A-RAM features easy discrimination of ‘0’ and ‘1’ states, simple control waveforms and very promising performance. [Copyright &y& Elsevier]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of Solid-State Electronics is the property of Pergamon Press - An Imprint of Elsevier Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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        Value: 10.1016/j.sse.2011.01.006
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      – Code: eng
        Text: English
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        Type: general
      – SubjectFull: Metal oxide semiconductor field-effect transistors
        Type: general
      – SubjectFull: Simulation methods & models
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      – SubjectFull: Electrostatics
        Type: general
      – SubjectFull: Silicon-on-insulator technology
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      – SubjectFull: Random access memory
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      – SubjectFull: Electrons
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      – SubjectFull: Performance evaluation
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      – TitleFull: Capacitor-less A-RAM SOI memory: Principles, scaling and expected performance
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              Text: May2011
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