Bibliographic Details
| Title: |
Design and Manufacturing of Micro Via-In-Pad Substrates for Solder Bumped Flip Chip Applications. |
| Authors: |
Lau, John, Chang, Chris, Lee, Ricky, Chen, Tsung-Yuan, Cheng, David, Tseng, Tzyy Jang, Lin, Dyna |
| Source: |
Journal of Electronics Manufacturing. Mar2000, Vol. 10 Issue 1, p79. 9p. |
| Subjects: |
Integrated circuits, Chip scale packaging |
| Abstract: |
A novel and low-cost micro via-in-pad (VIP) substrate for supporting a solder bumped flip chip is presented in this study. Emphasis is placed on the design, materials, process, manufacturing, and reliability of the micro VIP substrate of a chip scale package (CSP), and of the micro VIP CSP printed circuit board (PCB) assembly. Cross-sections of samples are examined for a better understanding of the solder bump, CSP redistribution, VIP, and solder joint. Non-linear finite element analyses are used to determine the stress and strain in the copper VIP and the solder joint. Time-dependent non-linear analysis is used to predict the thermal-fatigue life of the VIP solder joint. [ABSTRACT FROM AUTHOR] |
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| Database: |
Engineering Source |
