Enhanced Programming and Erasing Speeds in P-Channel Charge-Trapping Flash Memory Device With SiGe Buried Channel.
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| Title: | Enhanced Programming and Erasing Speeds in P-Channel Charge-Trapping Flash Memory Device With SiGe Buried Channel. |
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| Authors: | Liu, Li-Jung1, Chang-Liao, Kuei-Shu1, Jian, Yi-Chuen1, Cheng, Jen-Wei1, Wang, Tien-Ko1, Tsai, Ming-Jinn2 |
| Source: | IEEE Electron Device Letters. Sep2012, Vol. 33 Issue 9, p1264-1266. 3p. |
| Subjects: | Computer programming, Magnetic memory (Computers), Silicon germanium integrated circuits, Logic circuits, Nonvolatile memory, Atomic layer deposition, Electrons |
| Abstract: | The operation characteristics of p-channel \TaN/\break\Al2\O3/\HfO2/\HfAlO2/\SiO2/\Si MAHOS-type nonvolatile memory devices with different Ge contents in a SiGe buried channel are investigated in this letter. Compared with those of a device having a conventional Si-channel, both programming and erasing speeds are significantly improved by employing a \Si0.7\Ge0.3 buried channel. Satisfactory retention and excellent endurance characteristics up to \10^6\ \P/E cycles with 4.1-V memory window show that the degradation on reliability properties, if it exists, is negligible when the SiGe buried channel is introduced. [ABSTRACT FROM AUTHOR] |
| Copyright of IEEE Electron Device Letters is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
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| Items | – Name: Title Label: Title Group: Ti Data: Enhanced Programming and Erasing Speeds in P-Channel Charge-Trapping Flash Memory Device With SiGe Buried Channel. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Liu%2C+Li-Jung%22">Liu, Li-Jung</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Chang-Liao%2C+Kuei-Shu%22">Chang-Liao, Kuei-Shu</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Jian%2C+Yi-Chuen%22">Jian, Yi-Chuen</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Cheng%2C+Jen-Wei%22">Cheng, Jen-Wei</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Wang%2C+Tien-Ko%22">Wang, Tien-Ko</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Tsai%2C+Ming-Jinn%22">Tsai, Ming-Jinn</searchLink><relatesTo>2</relatesTo> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22IEEE+Electron+Device+Letters%22">IEEE Electron Device Letters</searchLink>. Sep2012, Vol. 33 Issue 9, p1264-1266. 3p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Computer+programming%22">Computer programming</searchLink><br /><searchLink fieldCode="DE" term="%22Magnetic+memory+%28Computers%29%22">Magnetic memory (Computers)</searchLink><br /><searchLink fieldCode="DE" term="%22Silicon+germanium+integrated+circuits%22">Silicon germanium integrated circuits</searchLink><br /><searchLink fieldCode="DE" term="%22Logic+circuits%22">Logic circuits</searchLink><br /><searchLink fieldCode="DE" term="%22Nonvolatile+memory%22">Nonvolatile memory</searchLink><br /><searchLink fieldCode="DE" term="%22Atomic+layer+deposition%22">Atomic layer deposition</searchLink><br /><searchLink fieldCode="DE" term="%22Electrons%22">Electrons</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: The operation characteristics of p-channel \TaN/\break\Al2\O3/\HfO2/\HfAlO2/\SiO2/\Si MAHOS-type nonvolatile memory devices with different Ge contents in a SiGe buried channel are investigated in this letter. Compared with those of a device having a conventional Si-channel, both programming and erasing speeds are significantly improved by employing a \Si0.7\Ge0.3 buried channel. Satisfactory retention and excellent endurance characteristics up to \10^6\ \P/E cycles with 4.1-V memory window show that the degradation on reliability properties, if it exists, is negligible when the SiGe buried channel is introduced. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of IEEE Electron Device Letters is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1109/LED.2012.2206069 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 3 StartPage: 1264 Subjects: – SubjectFull: Computer programming Type: general – SubjectFull: Magnetic memory (Computers) Type: general – SubjectFull: Silicon germanium integrated circuits Type: general – SubjectFull: Logic circuits Type: general – SubjectFull: Nonvolatile memory Type: general – SubjectFull: Atomic layer deposition Type: general – SubjectFull: Electrons Type: general Titles: – TitleFull: Enhanced Programming and Erasing Speeds in P-Channel Charge-Trapping Flash Memory Device With SiGe Buried Channel. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Liu, Li-Jung – PersonEntity: Name: NameFull: Chang-Liao, Kuei-Shu – PersonEntity: Name: NameFull: Jian, Yi-Chuen – PersonEntity: Name: NameFull: Cheng, Jen-Wei – PersonEntity: Name: NameFull: Wang, Tien-Ko – PersonEntity: Name: NameFull: Tsai, Ming-Jinn IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 09 Text: Sep2012 Type: published Y: 2012 Identifiers: – Type: issn-print Value: 07413106 Numbering: – Type: volume Value: 33 – Type: issue Value: 9 Titles: – TitleFull: IEEE Electron Device Letters Type: main |
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