Bibliographic Details
| Title: |
Ranking function synthesis for bit-vector relations. |
| Authors: |
Cook, Byron1 bycook@microsoft.com, Kroening, Daniel2 kroening@cs.ox.ac.uk, Rümmer, Philipp3 philipp.ruemmer@it.uu.se, Wintersteiger, Christoph1 cwinter@microsoft.com |
| Source: |
Formal Methods in System Design. Aug2013, Vol. 43 Issue 1, p93-120. 28p. |
| Subjects: |
Software verification, Computer software termination, Algorithms, Data structures, Array processors, Multiprocessors |
| Abstract: |
Ranking function synthesis is a key component of modern termination provers for imperative programs. While it is well-known how to generate linear ranking functions for relations over (mathematical) integers or rationals, efficient synthesis of ranking functions for machine-level integers (bit-vectors) is an open problem. This is particularly relevant for the verification of low-level code. We propose several novel algorithms to generate ranking functions for relations over machine integers: a complete method based on a reduction to Presburger arithmetic, and a template-matching approach for predefined classes of ranking functions based on reduction to SAT- and QBF-solving. The utility of our algorithms is demonstrated on examples drawn from Windows device drivers. [ABSTRACT FROM AUTHOR] |
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| Database: |
Engineering Source |